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[AI2]Technical Summary · 26 October 2026
Asymmetric Intelligence & Innovation · Nashville, Tennessee

Technical Summary and Related Work

The AI2 gate is a reference monitor and a safety instrumented function, applied to the actions of AI agents. This page states what the corpus inherits, what it adds, and what it still owes.

David P. Reichwein · Read first, before any paper · Companion to every paper in the gate track
§00 · Summary

Fifty years of practice, one new place to apply it.

Computer security has known since 1972 how to mediate every access through a small, tamper-proof checker that the governed program cannot reach. Process safety has known for decades how to keep a trip independent of the control system it protects, how to make one demand win over any number of permits, and how to require a deliberate reset after a trip. The corpus applies both, in independent hardware, to the individual actions of an AI agent: the tool call, the transfer, the write, the command.

That is the AI2 gate. A model proposes an action. A separate, finite evaluator, sharing no write path, memory, clock or power with the model, decides whether that exact action may cross a declared boundary now. Denial dominates. Authority is never restored by the governed system. The object that reaches the consequence must be the object that was authorized.

In one line: a reference monitor in Anderson's sense, built with the independence discipline of a safety instrumented system, placed on the action path of an AI agent.

The Model Proposes. The Gate Disposes.™

The corpus uses its own vocabulary because it extends these ideas in specific ways, set out in §03. Each paper in the gate track now carries a lineage note at the top and a related-work section at the end, so that a reader trained in either discipline can place every result against the work it builds on.

§01 · Lineage

Four traditions the gate stands on.

The reference monitor

Anderson's 1972 planning study for the U.S. Air Force defined a reference validation mechanism with three properties: it is always invoked, it is tamper-proof, and it is small enough to be analyzed and tested completely. Saltzer and Schroeder (1975) named the surrounding principles, including complete mediation, fail-safe defaults and separation of privilege. Axiom A1 and its six construction obligations (Genesis §7.1) are the tamper-proof property stated for physical hardware. WP-12's requirement that the evaluator be a finite automaton, checkable over every reachable state, is the third property. Rule R4, "every effect is mediated," is complete mediation.

Independent protection layers

IEC 61508 and IEC 61511 require a safety instrumented system to be independent of the basic process control system it protects, and they treat common-cause failure (shared power, clocks, firmware and so on) as the thing independence must defeat. WP-16 §04 states the same pattern: the optimizer proposes, the regulator executes, the independent trip disposes. The corpus's four-state chain is a trip with two hold states and a latched state. Its global meet is 1ooN voting, where any single demand trips (Genesis §4.3 compares it with 1oo2, 2oo3 and 2oo4D directly). The requirement that recovery from a trip take two rising edges from disjoint trust domains is a manual reset with separation of duty.

Runtime assurance

The Simplex architecture (Sha, 2001) pairs an unverified high-performance controller with a verified safety controller and a decision module that switches between them. ASTM F3269 standardizes the same pattern for aircraft. The gate keeps the decision module and removes the second controller: when authorization is lost, outputs fall to a fixed fail-safe state rather than to an alternative policy, and they stay there until an exogenous grant. Control barrier functions (Ames et al.) supply the certificate that WP-12's proposal side computes and the evaluator only checks.

Enforceable policies and execution monitors

Schneider (2000) characterized the policies an execution monitor can enforce: those whose violation can be detected on a finite prefix of execution, so that the monitor halts the program before the bad step. Ligatti, Bauer and Walker extended this to edit automata, and shield synthesis (Bloem et al.) applied it to reactive and learning systems. WP-17C's distinction between authorization and quarantine is Schneider's distinction between preventing a bad step and responding after one, stated for agents and their effects.

§02 · Term map

The corpus's terms, and the standard names.

Use this table to read any paper in the gate track. The last column is the part each paper has to defend as its own.

Corpus termStandard termLineageWhat the corpus adds
Λ, the adaptive execution planeUntrusted component; Simplex high-performance controllerAnderson 1972; Sha 2001The AI model is untrusted by default, however capable it is
Π, the governance stack (F, the evaluator inside it)Reference monitor; Simplex decision module; SIS logic solverAnderson 1972; Sha 2001; IEC 61511Enforced in separate silicon, at the level of individual agent actions
Axiom A1 and obligations A1.1–A1.6Tamper-proofness; separation; SIS independence and common-cause defenceAnderson 1972; Rushby 1981; IEC 61508, IEC 61511Clock, reset and power domains named explicitly, as an audit obligation rather than a proof
Global meet; zero masking; deny dominates1ooN trip voting; fail-safe defaults; lattice meetIEC 61508 voting architectures; Saltzer and Schroeder 1975; Denning 1976Trip voting applied to the permissions an agent holds, with the availability cost stated (Genesis §4.4)
Four-state chain BOT < IDLE < COND < TOPTrip, hold points and run permissiveProcess-safety practice (hold point versus scram)Two non-latched hold states that carry diagnostic information
Ratchet; authority is never restored autonomouslyLatching trip; manual resetIEC 61511Latching applied to authority itself, with the fan-in of the set input audited at netlist level (WP-10 Obligation 6)
Two rising edges from disjoint trust domainsTwo-person rule; separation of duty; separation of privilegeSaltzer and Schroeder 1975; Clark and Wilson 1987Required in hardware, as edges rather than levels (Genesis Theorem 6.3)
Input equals output, or fail closed (R3, Law 5)Complete mediation at the point of use; time-of-check-to-time-of-use prevention; integrity bindingSaltzer and Schroeder 1975; Bishop and Dilger 1996Comparison at the point of consequence, on the evidence path as well as the object path
Binding at origin; state-witness isolationProvenance; measured attestation; signed sensor dataTCG TPM 2.0 attestationThe evaluator verifies a binding it did not compute
PCR™, the Permission Control RuntimeSynchronous policy enforcement point and decision pointOASIS XACML 3.0; NIST SP 800-162; NIST SP 800-207The decision point runs on the independent hardware, under a pause → contextualize → resume cycle
Grant: exogenous, fresh, bound, single-use (WP-16 Rule 2A)Capability; time-boxed, caveated, bounded-use tokenDennis and Van Horn 1966; Birgisson et al. 2014Checked against a pinned action schema, with a unique admissible interpretation (Rule 3A)
Authorization Gap™Missing mediation at the action boundary; confused deputyHardy 1988; Saltzer and Schroeder 1975Locates the gap where agents act, and gives a falsification condition for closing it
Level 3 versus Level 4 (WP-12, WP-17C)SIS trip on measured state versus a start permissiveIEC 61511; Schneider 2000A ladder that classifies containment products against pre-effect authorization
Level 7, energy-bound controlDe-energize to trip; Safe Torque Off; stop categories 0 and 1IEC 61800-5-2; IEC 60204-1The governed intelligence's own supply is the controlled path, with drop order and reservoir bounds
Path dossier, ten exhibits (WP-18)Assurance case; safety case evidenceKelly and Weaver 2004 (GSN); ISO/IEC/IEEE 15026-2One case per path, with a machine-readable schema that refuses a claim with a missing exhibit
Monitoring link with no control pathData diode; unidirectional gatewayIEC 62443 zones and conduitsRemote supervision of the gate without a path into it
§03 · What is new

Five claims the corpus defends as its own.

  1. A safety-instrumented discipline for agent actions. Trip voting, latching, proof testing and independence come from process safety. Applying them to typed, canonicalized agent actions, in hardware that shares no write path, memory, clock or power with the model, is the contribution.
  2. A classification test for containment products. "Trace is not permit," "policy is not gate" and "latency is not position" (WP-17C §6) have no standard names. With the ten-part evidence test and a single red-team victory condition, they form a test that any agent-security product can be run against, path by path, including AI2's own.
  3. Identity at the point of consequence, on both paths. Integrity binding is established practice. Requiring the comparison at the consequence rather than only at the gate, and requiring the verifier never to compute the binding it checks, for both the action and the evidence, is stronger than most attestation schemes.
  4. Authority that only an exogenous act can raise. A latching trip is standard. Proving that no rule, admissible or malicious, can raise the latched aggregate (WP-10 Theorem 4), and extending that to rewrites (WP-13) and successors (WP-14), carries the latch from a plant into a system that changes itself.
  5. Grant policy as a separate seat. The gate enforces whatever valid grant it receives. WP-19 states who may hold that power and why denial, the safe direction for a machine, is a harm when the governed party is a person.
§04 · Nearest prior art

Where the gate differs from what already exists.

Prior workWhat it doesHow the gate differs
Simplex; ASTM F3269 runtime assuranceSwitches control to a verified fallback controller when the advanced controller leaves a safety envelopeNo fallback policy: loss of authorization de-energizes to a fixed fail-safe and latches. Re-entry needs an exogenous grant, not a return to the envelope.
Separation kernels; seL4Prove isolation of partitions sharing one processor, with a machine-checked proof (seL4)Isolation is physical rather than proved about shared hardware. seL4 has a mechanized proof. The gate does not yet; WP-10 Obligation 5 lists it as open.
Safety instrumented systems (IEC 61511)Trip on measured process state after an excursion beginsThat is Level 3. Level 4 decides on a typed action or a predicted state, before the effect is issued.
Hardware security modules; TPMsGuard keys and attest platform state. An HSM refuses to use a key without authorization.The gate guards the effect, not the key. The HSM's refusal to sign is the nearest analog to Level 4, applied to one kind of effect.
Zero-trust policy enforcement pointsMediate access requests against a policy decision pointA software enforcement point shares fate with its host (Level 2). The gate places the decision in independent silicon on the action path.
Execution monitors; shieldsTheory of what a monitor can enforce, and synthesis of shields for reactive systemsThe theory carries over. The gate is a physical placement of such a monitor, with a latch the monitored system cannot reset.
Data diodesEnforce one-way information flow in hardwareUsed inside the gate's own design for supervision. The gate itself is two-way: proposals in, a decision out.
§05 · Status

What is proved, what is tested, what is owed.

The corpus keeps these separate, and so does this page.

ItemStatusWhere
Meet algebra, zero masking, latch invariance under arbitrary rulesPaper proofWP-10 §4; Genesis §4
No autonomous ascent; two-domain recoveryPaper proofWP-12 Theorem 3; Genesis Theorem 6.3
Evaluator RTL behaviourSimulation33-check testbench on 64/157,181 (WP-10 §6.1)
Mechanized proof (Coq, Lean or TLA+)OwedWP-10 Obligation 5; WP-12 §8
Netlist proof that only the reset line can raise the latchOwedWP-10 Obligation 6
Published bench data: latency, fault injectionOwedWP-16 §22; Genesis Appendix B
Worked end-to-end example on one plantOwedWP-12 §8
Level 7 cut-set, drop order, reservoir boundValidation targetWP-16 §18–19

The next exhibit. One real agent tool call, blocked end to end by the gate, with measured decision latency and a fault-injection log, would move the central claim from specified to demonstrated. That is the most valuable single addition to the corpus.

§06 · Notation

One symbol, one meaning.

Across the gate track, Λ is the adaptive execution plane (the model and everything sharing its fate) and Π is the governance stack that is structurally disjoint from it. F is the evaluator inside Π. Two papers use these letters differently, and each now says so at the top:

§07 · Reading order

Two tracks.

The gate is close to existing practice and deployable now: this summary, then WP-17C, WP-16, WP-10, Genesis Rev 3.1, WP-12, WP-13, WP-18, WP-19 and the errata. The Synthetic Intelligence programme is a research track that adds no authority to the gate: One Skin, Two Faces, the Canonical statement, WP-11, WP-14, WP-15 and WP-20. Its claims about a new kind of machine are stated as hypotheses with the observations that would falsify them. The index lists both.

References

Related work cited across the corpus

  1. Abadi, M., & Lamport, L. (1991). The existence of refinement mappings. Theoretical Computer Science, 82(2).
  2. Ames, A. D., Xu, X., Grizzle, J. W., & Tabuada, P. (2017). Control barrier function based quadratic programs for safety critical systems. IEEE Transactions on Automatic Control, 62(8).
  3. Anderson, J. P. (1972). Computer Security Technology Planning Study. ESD-TR-73-51, U.S. Air Force Electronic Systems Division.
  4. ASTM International. (2021). ASTM F3269-21, Standard Practice for Methods to Safely Bound Behavior of Aircraft Systems Containing Complex Functions Using Run-Time Assurance.
  5. Belnap, N. D. (1977). A useful four-valued logic. In J. M. Dunn & G. Epstein (Eds.), Modern Uses of Multiple-Valued Logic. Reidel.
  6. Birgisson, A., Politz, J. G., Erlingsson, Ú., Taly, A., Vrable, M., & Lentczner, M. (2014). Macaroons: Cookies with contextual caveats for decentralized authorization in the cloud. Proc. NDSS.
  7. Bishop, M., & Dilger, M. (1996). Checking for race conditions in file accesses. Computing Systems, 9(2).
  8. Bloem, R., Könighofer, B., Könighofer, R., & Wang, C. (2015). Shield synthesis: Runtime enforcement for reactive systems. Proc. TACAS.
  9. Clark, D. D., & Wilson, D. R. (1987). A comparison of commercial and military computer security policies. Proc. IEEE Symposium on Security and Privacy.
  10. Denning, D. E. (1976). A lattice model of secure information flow. Communications of the ACM, 19(5).
  11. Dennis, J. B., & Van Horn, E. C. (1966). Programming semantics for multiprogrammed computations. Communications of the ACM, 9(3).
  12. Hardy, N. (1988). The confused deputy. ACM SIGOPS Operating Systems Review, 22(4).
  13. IEC 60204-1:2016. Safety of machinery — Electrical equipment of machines (stop categories).
  14. IEC 61508:2010. Functional safety of electrical/electronic/programmable electronic safety-related systems.
  15. IEC 61511-1:2016. Functional safety — Safety instrumented systems for the process industry sector.
  16. IEC 61800-5-2:2016. Adjustable speed electrical power drive systems — Safety requirements — Functional (Safe Torque Off).
  17. IEC 62443 series. Security for industrial automation and control systems.
  18. ISO/IEC/IEEE 15026-2. Systems and software engineering — Systems and software assurance — Assurance case.
  19. Kelly, T., & Weaver, R. (2004). The Goal Structuring Notation: A safety argument notation. Proc. DSN Workshop on Assurance Cases.
  20. Klein, G., et al. (2009). seL4: Formal verification of an OS kernel. Proc. SOSP.
  21. Leveson, N. G. (2012). Engineering a Safer World. MIT Press.
  22. Ligatti, J., Bauer, L., & Walker, D. (2005). Edit automata: Enforcement mechanisms for run-time security policies. International Journal of Information Security, 4(1–2).
  23. NIST SP 800-162 (2014). Guide to Attribute Based Access Control. NIST SP 800-207 (2020). Zero Trust Architecture.
  24. OASIS (2013). eXtensible Access Control Markup Language (XACML) Version 3.0.
  25. Rushby, J. (1981). Design and verification of secure systems. Proc. SOSP.
  26. Saltzer, J. H., & Schroeder, M. D. (1975). The protection of information in computer systems. Proceedings of the IEEE, 63(9).
  27. Schneider, F. B. (2000). Enforceable security policies. ACM Transactions on Information and System Security, 3(1).
  28. Schneier, B., & Kelsey, J. (1999). Secure audit logs to support computer forensics. ACM Transactions on Information and System Security, 2(2).
  29. Sha, L. (2001). Using Simplex to improve software safety in high-assurance systems. IEEE Software, 18(4).
  30. Trusted Computing Group. TPM 2.0 Library Specification.
  31. U.S. NIST (2019). FIPS 140-3, Security Requirements for Cryptographic Modules.
David P. Reichwein
Founder & CEO · Asymmetric Intelligence & Innovation · Nashville, Tennessee · ai2papers.com · intelligencecontrolled.com